VLSI

DIC VIVA A & A

2012-01-04T21:22:00.001-08:00

--
A fool may talk, but a wise man speaks

கோ NOTES

2010-10-14T00:49:00.001-07:00

COA(1).rar

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COA-link

2010-10-14T00:34:00.001-07:00

Click on this to get COA notes

http://rapidshare.com/files/424960797/COA_1_.rar
--
Helping hands are better than praying lips.

Fwd: Notes - reg

2010-10-14T00:31:00.000-07:00

---------- Forwarded message ----------
From: S Karthik <skarthikmtech@gmail.com>
Date: Thu, Oct 14, 2010 at 12:59 PM
Subject: Notes - reg
To: rsmn.dk@gmail.com

--
Helping hands are better than praying lips.

--
Helping hands are better than praying lips.

ram-reg

2010-04-28T01:48:00.001-07:00

module simple_ram(data,write_address,read_address,clk,we,out);

input[7:0] data;
input[3:0] read_address,write_address;
input we,clk;
output out;

reg[7:0] out;

reg[7:0] simpleram[15:0];

always@(posedge clk)
begin

if(we)
simpleram[write_address] <= data;

out<= simpleram[read_address];
end
endmodule

module simple_ram_tst;

reg[3:0] read_address, write_address;

reg clk, we;

reg[7:0] data;

wire[7:0] out;

simple_ram s1(data,write_address,read_address,clk,we,out);

initial
begin

clk=1'b0;we=1'b0;

#5 we=1'b1; data=8'd128;
write_address=4'd10;
#5 data=8'd4;
write_address=4'd2;
#50 read_address=4'd2;
#50 read_address=4'd10;
#500 $finish;

end

always #3 clk=~clk;

endmodule

module top (clk, rw, rdy, oe, we);
input clk;
reg y1=0, y2=0;
input rw, rdy;
output reg oe=0, we=0;

always @ (posedge clk) begin
case ({y1,y2,rw,rdy})
4'b0000: {y1,y2,oe,we} <= 4'b0000;
4'b0001: {y1,y2,oe,we} <= 4'b0100;
4'b0011: {y1,y2,oe,we} <= 4'b0100;
4'b0010: {y1,y2,oe,we} <= 4'b0000;
4'b0100: {y1,y2,oe,we} <= 4'b1100;
4'b0101: {y1,y2,oe,we} <= 4'b1100;
4'b0111: {y1,y2,oe,we} <= 4'b1000;
4'b0110: {y1,y2,oe,we} <= 4'b1000;
4'b1100: {y1,y2,oe,we} <= 4'b1101;
4'b1101: {y1,y2,oe,we} <= 4'b0001;
4'b1111: {y1,y2,oe,we} <= 4'b0001;
4'b1110: {y1,y2,oe,we} <= 4'b1101;
4'b1000: {y1,y2,oe,we} <= 4'b1010;
4'b1001: {y1,y2,oe,we} <= 4'b0010;
4'b1011: {y1,y2,oe,we} <= 4'b0010;
4'b1010: {y1,y2,oe,we} <= 4'b1010;
endcase
end
endmodule

--
Helping hands are better than praying lips.

2010-01-25T04:43:00.001-08:00

http://rapidshare.com/files/340811804/ppt2.ppt.html

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2010-01-25T04:39:00.000-08:00

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Projectandtraining

2008-08-06T23:17:00.000-07:00

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Einstein's golden word

2008-07-29T05:33:00.000-07:00

“Two things are infinite: the universe and human stupidity; and I'm not sure about the the universe.”

Megaupload file delivery: Fuzzy Logic.htm (44.8 KB)

2008-07-29T05:10:00.001-07:00

Hello,

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Its time .....for doing project....

2008-07-27T22:30:00.000-07:00

Hi all , Soon you can get more stuff regarding various issues in different field and technology. See you soon with the updates.

A file from eSnips

2008-06-12T22:37:00.001-07:00

A file from eSnips

Hi, Check out this file I found on eSnips.  Cheers, s karthik

Link to VLSI FAQ...

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A file from eSnips

2008-06-12T22:37:00.000-07:00

A file from eSnips

Hi, Check out this file I found on eSnips.  Cheers, s karthik

Link to VLSI FAQ...

Share all your passions on eSnips. You get 5GB of free storage.

RapidShare - New uploads for you at RapidShare.com

2008-06-04T01:59:00.001-07:00

Welcome to the upload service of RapidShare.com.

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list of vlsi companies in chennai

2008-06-04T01:48:00.001-07:00

http://rapidshare.com/files/119980853/VLSI.doc.html

About me

2008-03-31T07:00:00.000-07:00

Riding The Next Wave Of Embedded Multicore Processors

2008-03-31T06:50:00.000-07:00

21.1.08.pps

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DIFFERENT APPROACHES IN ROUTERS FOR ROUTING METHODS.

2008-03-31T06:43:00.000-07:00

seminar ppt1.ppt

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DE2 User Manual

2008-03-19T05:17:00.001-07:00

Click on this link to get DE2(CYCLONE II) USER MANUAL

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HDL -The E-Book

2008-03-18T06:34:00.000-07:00

hdl.pdf

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CIRCUITS $ HOBBISTS

2008-03-14T22:26:00.001-07:00

Hi all,

Here is an link for an useful stuff which contains many simple circuits for hobby.

http://rapidshare.com/files/99641614/Circuits_for_the_Hobbyist.pdf.html

Regards,

CADANCE MANUAL

2008-03-14T22:14:00.001-07:00

CADENCE%20Manual.p...

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VLSI HANDBOOK

2008-03-14T22:11:00.000-07:00

VLSI_Handbook.pdf

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Free-VLSI E-training

2008-03-05T07:05:00.000-08:00

STEP1: View Technology Topics lis http://www.signatrix.in/Training_modules.html STEP2: View ONLINE VLSI Training videos http://www.signatrix.in/eskills.html STEP3: Enter Live Training Lounge http://www.signatrix.in/e-learning_reg.html

VLSI -100

2008-03-05T07:00:00.000-08:00

VLSI'>http://www.esnips.com/doc/842ab7a7-51d0-493c-9c6f-fc9858cc1b0c/VLSI-100-Questions/?widget=documentIcon">VLSI

DIGITAL FM RECEIVER- PPT

2008-03-05T05:11:00.000-08:00

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DIGITAL FM RECEIVE...

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WIMAX TECHNOLOGY-IEEE 802.16

2008-03-05T04:16:00.000-08:00

Worldwide Interoperability for Microwave Access-As communications distances grow, it becomes infeasible economically to connect information sources and information users using coaxial cables and fiber optic links. But wireless technology can provide cost-effective access to remote, difficult-to-reach areas.It is already for some decades, that microwave- and laser-links allow high-speed point-to-point-(P2P)- and point-to-multipoint-(P2MP)-connectivity. However, there were only proprietary systems in the past. WiMAX (Worldwide Interoperability for Microwave Access)—or IEE 802.16 or Wireless MAN—provides such broadband wireless access over larger areas than 802.11 (Wireless LAN), and it does so at broadband speeds. The objective of IEEE802.16 is the standardization of these BWA-systems for cost reduction, market and product enhancement. The technology promises data rate of up to 75 MBit/ s across distances of up to 50 km. The work group 16 of the IEEE802 activities [43] deals with the Broadband Wireless Access (BWA) for stationary and mobile nodes. In the field of marketing and compatibility tests, the standard is supported by the WiMAX-Forum [42]. WiMAX stands for ”Worldwide Interoperability for Microwave Access”. This non-profit organisation (NPO) has already more than 400 company members (as of Jan 2007). Although the activities started in the late nineties only, IEEE802.16 comes with a plethora of elements and options. This is mainly caused by the fact that this standard derives from proprietary solutions.

IMPLEMENTATION OF 2-D ELEVATOR CONTROLLER

2008-03-04T06:22:00.000-08:00

Currently, building heights are restricted by the design limitations of their elevators. Elevator cables can reach a maximum length of 500 yards before they stretch too much under their own weight. A solution to this problem has been suggested here by 2_dimensional elevator controller. The solution involves an electromagnetic elevator that operates not only in the traditional vertical dimension, but also in a horizontal dimension. This would be implemented by using horizontal transfer shafts that allow the elevator cars to move from side to side, allowing multiple cars to be stacked in a single shaft to allow for more efficient traffic routing. The elevator controller consists mainly the following blocks namely car router, car selector, memory handler, car driver, car register, memory, VGA driver. Here we are going to concentrate on one of the important module i.e. CAR SELECTOR.

When a request is made, it is passed to the car selector. From here, the each shaft of the requested level and floor is searched in the memory map to determine if the request location lies in the path of an existing route. If it does, the location in the route is marked for a stop. If not, there are two courses of action. If the request originated internally (within the car), the car’s current location, identification number, and destination (request) location are passed to the car router. If the request came from outside of the car (external), the car register – a register addressed with car ID’s and containing each car’s current location and status – is polled to find the closest available car. If no car is available, the register is polled until one becomes free. Once a free car is found, the busy signal is asserted, and the car’s identification number, current location and destination location are passed to the car router.Keywords: 2_dimensional elevator

Keywords: 2_dimensional elevator controller, CAR selector.

Emulation of Neural Networks

2008-03-04T06:20:00.000-08:00

In this paper, we propose using a nanoscale spin-wave-based architecture for implementing neural networks. We show that this architecture can efficiently realize highly interconnected neural network models such as the Hopfield model. In our proposed architecture, no point-to-point interconnection is required, so unlike standard VLSI design, no fan-in/fan-out constraint limits the interconnectivity. Using spin-waves, each neuron could broadcast to all other neurons simultaneously and similarly a neuron could concurrently receive and process multiple data. Therefore in this architecture, the total weighted sum to each neuron can be computed by the sum of the values from all the incoming waves to that neuron. In addition, using the superposition property of waves, this computation can be done in O(1) time, and neurons can update their states quite rapidly.

NEMS

2008-03-04T06:11:00.000-08:00

NEM-devices can be used as extremely sensitive sensors for force and mass detection down to the single molecule level, as high-frequency resonators up to the GHz range, or as ultra-fast, low-power switches. Both a top-down and bottom-up approach is followed. The top-down approach consists of scaling down the existing micron-size MEMS technology far into the sub-100 nm range. In the bottom-up approach suspended structures of single-walled carbon nanotubes and of (semiconducting) nanowires are fabricated. In particular, (new) mechanisms for detection of displacements and eigenfrequencies are studied with the goal to reveal the physical processes (e.g. damping, thermal effects, momentum noise) that limit the sensitivity of the devices. Novel optical and magnetic detection schemes need to be investigated.

The search for the limits of mechanical motion is a central theme. At low temperature, quantum friction starts to limit the Q-factor and vibrating NEM-devices are limited by zero-point motion. This quantum limitation poses an ultimate limit to sensitivity of NEM-devices. In addition, other quantum phenomena are expected to be present. Quantum optics-like experiments with phonons, phonon lasers or quantum-tunnelling experiments with massive objects (strained suspended nanotubes placed between two gate electrodes) are just a few examples. As the size of NEM-devices shrinks down, electron-phonon coupling translates into an increasingly strong interplay between electrical and mechanical degrees of freedom. Device operation results in charge distributions that are inhomogeneous on the nanometer scale, giving rise to Coulomb forces that are strong enough to change device geometry. The classical theory of elasticity breaks down and the regime of quantum elasticity has been entered.

VLSI: MEMS

2008-03-04T06:08:00.000-08:00

www.ansys.com

MEMS

2008-03-04T05:55:00.000-08:00

MEMS is an abbreviation for Micro Electro Mechanical Systems. This is a rapidly emerging technology combining electrical, electronic, mechanical, optical, material, chemical, and fluids engineering disciplines. As the smallest commercially produced "machines", MEMS devices are similar to traditional sensors and actuators although much, much smaller. e.g. Complete systems are typically a few millimeters across, with individual features / devices of the order of 1-100 micrometers across.

MEMS devices are typically fabricated onto a substrate (chip) that may also contain the electronics required to interact with the MEMS device. Due to the small size and mass of the devices, MEMS components can be actuated electrostatically (piezoelectric and bimetallic effects can also be used). The position of MEMS components can also be sensed capacitively. Hence the MEMS electronics include electrostatic drive power supplies, capacitance charge comparators, and signal conditioning circuitry. Connection with the macroscopic world is via wire bonding and encapsulation into familiar BGA, MCM, surface mount, or leaded IC packages.

A common MEMS actuator is the "linear comb drive" (shown above) which consists of rows of interlocking teeth; half of the teeth are attached to a fixed "beam", the other half attach to a movable beam assembly. Both assemblies are electrically insulated. By applying the same polarity voltage to both parts the resultant electrostatic force repels the movable beam away from the fixed. Conversely, by applying opposite polarity the parts are attracted. In this manner the comb drive can be moved "in" or "out" and either DC or AC voltages can be applied. The small size of the parts (low inertial mass) means that the drive has a very fast response time compared to its macroscopic counterpart. The magnitude of electrostatic force is multiplied by the voltage or more commonly the surface area and number of teeth. Commercial comb drives have several thousand teeth, each tooth approximately 10 micro meters long. Drive voltages are CMOS levels.

For more stuff click the link below.

VLSI: Silicon and Carbides in fabrication

2008-03-03T05:58:00.000-08:00

http://www.ingentaconnect.com/

2 Extremes

2008-03-03T05:52:00.001-08:00

Two pictures that reveals man's different faces at two extremes

Digital FM receiver-an idea

2008-03-02T21:36:00.000-08:00

The design of the All Digital FM Receiver circuit in this uses PhaseLocked Loop (PLL) as the main core. The task of the PLL is to maintain coherence between the input (modulated) signal frequency, and the respective output frequency, via phase comparison. This self-correcting ability of the system also allows the PLL to track the frequency changes of the input signal once it is locked. The system of All Digital FM Receiver consists of a digital PLL cascaded with digital low pass filter. The last stage of the receiver system is to perform signal shaping. Here we use 16 tap Finite Impulse Response (FIR) filter to perform digital low pass filter. This filter is essentially average filter since its output is equal to the average value of its input over the last n-tap samples.

A Method for Designing a Deterministic Test Pattern Generator Based on Cellular Automata

2008-03-02T21:28:00.000-08:00

This paper presents a new approach for designing a built-in test pattern generator based on cellular automata (CA). Given a set of precomputed test patterns, a test pattern generator is synthesized to apply the given test set in a minimal test time. The CA design is based on a novel matrix representation method that permits the use of the complete rule space and not only the additive rules. A synthesis tool has been developed to implement this design method. This synthesis tool provides a VHDL description of the resultant generator, which facilitates its integration into other VLSI design tools. This design technique has been applied to the combinational ISCAS benchmark circuits providing good results in terms of design time, performance and test time required by the generator. Keywords: integrated circuit; VLSI; built-in-self-test; deterministic generation